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Forum Post: RE: OMAPL-138: Missing EDMA HWI

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Hi Vincent,

Thank you very much for the quick response, so far the machines running DSP_TSK_MODE *and* the BCACHE calls have been meeting our interrupt latency requirements. However, having experienced the latency introduced by the BCACHE calls in the past, it would be ideal to remove them from DSPLink to reduce potential latencies.

I have included our DSPLink memory map along with the MAR bits, we have verified using the debugger that our MSGQ packets are indeed allocated in our defined region.

DSPLink Regions from DSP Map file:
DSPLINKMEM0 c7100000 00005000 00000000 00005000 RWIX
DSPLINKMEM1 c7105000 0002b000 00000000 0002b000 RWIX
POOLMEM          c7130000 00600000 00000000 00600000 RWIX

MAR bits from BIOS tcf:
bios.GBL.C64PLUSMAR192to223 = 0x00000040; /* DDR 0xC6000000-0xC6FFFFFF = 16M is cacheable */

Doing a bit of experimenting in removing the BCACHE calls, it seems if we remove any of them from MPCS_enter() and MPCS_leave() in dsp/src/mpcs/mpcs.c results in a higher chance of missing interrupts on startup. However, removing BCAHE calls from ZCPYMQT_put() in dsp/src/msg/DspBios/zcpy_mqt.c seemed fine. This is all quite puzzling, as according to the aforementioned memory configuration all DSPLink memory is already in non-cached region.

Are you aware of any other DSPLink memory region that we need to move ?


Thank you very much,
Arya B.


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