Hey Ashish, I copied the ndk_2_24_00_11 directory, renamed it, made your changes and rebuilt it. I'm having issues with Code Composer recognizing the new NDK as being installed. I can add it under the Projects RTSC "other repositories", but it will not show up under RTSC->NDK repositories and the Project configuration does not show an NDK there. Once the NDK is rebuilt, is there a specific way to get Code Composer to recognize it? Thanks, John C.
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Forum Post: RE: NDK task priorities vs. application task priorities
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Forum Post: RE: How to use System_printf in tirtos_simplelink_2_11_00_03_eng
Hi Vincent, System_printf() by default uses either the SysStd or SysMin (default is SysMin) system provider. Depending on which system provider is plugged in, either putchar() or __write() is called. Both these calls use the semihosting library to print to the console in IAR. "__dwrite" is already implemented in IAR's runtime library. Which library are you linking with ? In order for semihosting to work, you need to be connected to the debugger. If the board is running stand alone, then it is best to plug in UART to get the print msgs. Since you already have UART_write() working, you can do the following to forward all System_printf() msgs to UART: *.cfg: var System = xdc.useModule('xdc.runtime.System'); var SysCallback = xdc.useModule('xdc.runtime.SysCallback'); System.SupportProxy = SysCallback; SysCallback.abortFxn = "&userAbort"; SysCallback.exitFxn = "&userExit"; SysCallback.flushFxn = "&userFlush"; SysCallback.putchFxn = "&userPutch"; SysCallback.readyFxn = "&userReady"; *.c: Void userAbort(CString str) { } Void userExit(Int val) { } Void userFlush() { } Void userPutch(Char ch) { UART_write(handle, ch, sizeof(ch)); } Void userReady() { ... } Once you do the above setup, you can use System_printf() instead of UART_write() and all your prints will be visible on the UART console. Best, Ashish
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Forum Post: RE: Steps to add the NDK to an existing SYSBIOS project running on custom hardware
NIMU layer. According to the NSP driver design guide, this layer is generic and doesn't change between platforms. There is only one file for this layer: Nimu_eth.c. After looking through the routines in this file, I would agree to leave this file alone. Ethernet Mini-Driver layer. According to the NSP driver design guide, this layer needs to be customized when changing platforms. There is only one file for this layer: Ethdriver.c. Near the top of this file are some configuration options. You can set the HW interrupt vectors (via RXINT and TXINT), so that make sense. CORENUM is not documented anywhere, so I'm not sure if I need to do anything with that. EXTERNAL_MEMORY and EXTMEM are defined in the NSP driver design guide, and imply that the packet buffer memory is located in external memory. Since EXTMEM is set to 0x80000000, that equals the L3(or shared RAM) inside the C6748 DSP. However, when I compile my project and look at the MAP file, it is showing zero bytes used for the L3 RAM. Something is not making sense. PKT_MAX is set to 64, but after reading description for this in the NSP driver design guide, I'm still unsure if I should change it. My system has plenty of memory, so my first thought is to increase it. What are the advantages / disadvantages to increasing PKT_MAX? Finally, there are other configuration variables described in the NSP driver design guide, and they are defined in Nimu_eth.h. They are: PKT_PREPAD, RAM_MCAST, HASH_MCAST, and PKT_MAX_MCAST. I'm leaning towards not changing any of these. CSL layer. According to the NSP driver design guide, this layer is generic and can be ported across platforms as long as the EMAC HW doesn't vary a lot. Well that is kind of an open ended statement, but since I know this NSP code was written for the OMAPL138, and I'm using the C6748, I know the EMAC HW is exactly the same. This would imply I shouldn't have to make any changes. There are two files for this layer: csl_emac.c and csl_mdio.c. After looking through csl_emac.c, and can't see anything that would need changing. However, I have no idea how EMAC_timerTick( ) gets called every 100mS. Nothing in the NSP code seems to call this routine. Is it needed, not needed??? csl_mdio.c might need some modification. Near the top of the file is the variable macsel. It is currently set to MII (which is fine for my hardware), but what if my hardware was setup to use RMII. Would I change this to RMII? VBUSCLK is also defined at the top of this file, and it is set to 75. According to the comment, it is suppose to represent SYSCLK4. On my hardware SYSCLK4 is running at 91MHz, so would I change VBUSCLK to 91? Thanks, Dean
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Forum Post: RE: Error Creating Hwi dynamically
Hi Nicolas, We do not support runtime creates on MSP430. There are several reasons for this. Supporting only static objects helps save some code memory (no create/delete code). The Hwi dispatch table is fixed and not modifiable at runtime and therefore timers cannot be created at runtime. If you look at your app's cfg file, you will see that the memoryPolicy is being set to STATIC: Defaults.common$.memoryPolicy = xdc.module("xdc.runtime.Types").STATIC_POLICY; Best, Ashish
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Forum Post: RE: NDK task priorities vs. application task priorities
Hi John, Have you tried finding the product through product discovery ? Basically you need to click on Windows->Preferences menu item. In the preferences window, go to "Code Composer Studio"->"RTSC"->"Products" tab. Add the path to the newly built ndk directory in the project discovery path section and then click on "search now". A new window with all newly discovered products should open up. Next you need to select the newly built ndk and hit finish. This should install it. Best, Ashish
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Forum Post: RE: Quetion of point color on Outline
Hi Hiroyasu, Do you have a TI-RTOS related question ? Best, Ashish
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Forum Post: RE: NDK task priorities vs. application task priorities
Hi John, Variables like NSP_INSTALL_DIR, BIOS_CG_ROOT and COMM_TI_UIA_INSTALL_DIR can be found in "project properties -> Build" window's "variables" tab: Make sure you select "Show system variables" at the bottom. It is not selected by default and unless it is selected no variables will show up. Best, Ashish
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Forum Post: RE: Porting new codec for am335x
Dear Yordan, Thanks a lot for your quick suggestions & responses, 1) I would like to follow, as per your 1. suggestion i.e, I would like to adopt similar to aic31xx_audio_map structure in tlv320aic31xx.c in uda134x.c, as I was again confused with aic31xx_audio_map structure members, in my case since am using internal clock source ,whether again I should use CODEC_CLK_IN or CODEC_CLK_OUT???.. & I didn't understand what is PLLCLK, BCLKN_DIV, NDAC_DIV, NADC_DIV, MDAC_DIV & MADC_DIV?.. in tlv320aic31xx.c, aic31xx_audio_map structure {"CODEC_CLK_IN", NULL, "PLLCLK"}, {"CODEC_CLK_IN", NULL, "BCLKN_DIV"}, {"CODEC_CLK_IN", NULL, "NDAC_DIV"}, {"CODEC_CLK_IN", NULL, "NADC_DIV"}, {"CODEC_CLK_IN", NULL, "MDAC_DIV"}, {"CODEC_CLK_IN", NULL, "MADC_DIV"}, /* Clocks for ADC */ {"ADC", NULL, "CODEC_CLK_IN"}, {"ADC", NULL, "MIC_GAIN_CTL"}, {"MIC_GAIN_CTL", NULL, "Mic Bias"}, /* Clocks for DAC */ {"DAC Left", NULL, "CODEC_CLK_IN" }, {"DAC Right", NULL, "CODEC_CLK_IN"}, /* Left Output */ {"Output Left", "From Left DAC", "DAC Left"}, {"Output Left", "From MIC1LP", "MIC1LP"}, {"Output Left", "From MIC1RP", "MIC1RP"}, /* Right Output */ {"Output Right", "From Right DAC", "DAC Right"}, {"Output Right", "From MIC1RP", "MIC1RP"}, {"ADC", NULL, "MIC_GAIN_CTL"}, {"MIC_GAIN_CTL", NULL, "Mic Bias"}, /* Clocks for DAC */ {"DAC Left", NULL, "CODEC_CLK_IN" }, {"DAC Right", NULL, "CODEC_CLK_IN"}, /* Left Output */ {"Output Left", "From Left DAC", "DAC Left"}, {"Output Left", "From MIC1LP", "MIC1LP"}, {"Output Left", "From MIC1RP", "MIC1RP"}, /* Right Output */ {"Output Right", "From Right DAC", "DAC Right"}, {"Output Right", "From MIC1RP", "MIC1RP"}, 2) How mclk, bit clock & lrclk mapping from mcasp to codec is done in this structure??? 3) as am new to alsa, as am using uda1345TS chipset ( datasheet - UDA1345TS ), as of now I have changed the routing particularly according to uda1345ts instead of uda134x, could you please help me in creating the structure the similar to Could you please help me in creating uda134x_audio_map structure similar to aic31xx_audio_map In sound/soc/codecs/uda134x.c /* Common DAPM widgets */ static const struct snd_soc_dapm_widget uda134x_dapm_widgets[] = { //SND_SOC_DAPM_INPUT("VINL1"), //SND_SOC_DAPM_INPUT("VINR1"), //SND_SOC_DAPM_INPUT("VINL2"), //SND_SOC_DAPM_INPUT("VINR2"), SND_SOC_DAPM_INPUT("VINL"), SND_SOC_DAPM_INPUT("VINR"), SND_SOC_DAPM_OUTPUT("VOUTL"), SND_SOC_DAPM_OUTPUT("VOUTR"), }; static const struct snd_soc_dapm_route uda134x_dapm_routes[] = { //{ "ADC", NULL, "VINL1" }, //{ "ADC", NULL, "VINR1" }, //{ "ADC", NULL, "VINL2" }, //{ "ADC", NULL, "VINR2" }, { "ADC", NULL, "VINL" }, { "ADC", NULL, "VINR" }, { "VOUTL", NULL, "DAC" }, { "VOUTR", NULL, "DAC" }, }; In DTSI ti,audio-routing = "ADC", "VINL", "ADC", "VINR", "VOUTL", "DAC", "VOUTR", "DAC"; In davinci-evm.c static int evm_uda134x_init(struct snd_soc_pcm_runtime *rtd) { struct snd_soc_codec *codec = rtd->codec; struct snd_soc_dapm_context *dapm = &codec->dapm; struct device_node *np = codec->card->dev->of_node; int ret; printk("DAVINCIIIIIIIIIII UDA134XXXXX evm_uda134x_init ENTERED\n"); snd_soc_dapm_new_controls(dapm, uda134x_dapm_widgets, ARRAY_SIZE(uda134x_dapm_widgets)); if (np) { ret = snd_soc_of_parse_audio_routing(codec->card, "ti,audio-routing"); if (ret) { printk("DAVINCIIIIIIIIIII UDA134XXXXX DAPM ROUTING BASED ON DTS IS FAILURE\n"); return ret; } else { printk("DAVINCIIIIIIIIIII UDA134XXXXX DAPM ROUTING BASED ON DTS IS SUCCESSFULL\n"); } } else { /* Set up davinci-evm specific audio path audio_map */ printk("DAVINCIIIIIIIIIII UDA134XXXXX DAPM ROUTING\n"); snd_soc_dapm_add_routes(dapm, uda134x_dapm_routes, ARRAY_SIZE(uda134x_dapm_routes)); } //snd_soc_dapm_enable_pin(dapm, "VINL1"), //snd_soc_dapm_enable_pin(dapm, "VINR1"), //snd_soc_dapm_enable_pin(dapm, "VINL2"), //snd_soc_dapm_enable_pin(dapm, "VINR2"), snd_soc_dapm_enable_pin(dapm, "VINL"), snd_soc_dapm_enable_pin(dapm, "VINR"), snd_soc_dapm_enable_pin(dapm, "VOUTL"); snd_soc_dapm_enable_pin(dapm, "VOUTR"); return 0; } I hope this should resolve all my problems Yordan, & would appreciate a lot once again for providing since long term support w.r.t this thread Could you please help me in creating this uda134x_audio_map structure as it is simple, because I don't know how mclk, bitclk & lrclk binding of mcasp with codec is done in this structure Would be very grateful to you.. Yordan, please help me in creating this structure as early as possible Awaiting for you replies Many Thanks in advance Yordan once again
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Forum Post: RE: fdOpenSession() fails
Hi Martin, Section 3.5.6 of the user guide explains how to interpret the report. As per the report, no memory is available for allocation. It looks like the memory manager init routine has not run yet. I am guessing what might be happening is that your statically created task that call fdOpenSession() is being called before the NDK task runs and is able to initialize the NDK stack. Can you try the following ? - Create a sempahore and update your network task to pend on it before calling fdOpenSession(). - Add a networkIPAddrHook function that posts this semaphore. This hook function is called once the stack is initialized so it should be safe to unblock your network task so it can call fdOpenSession() at this time. *.cfg: var Global = xdc.useModule('ti.ndk.config.Global'); Global.networkIPAddrHook = '&myIPAddrHook'; *.c: Void myIPAddrHook(IPN IPAddr, uint IfIdx, uint fAdd) { Semaphore_post(...); } Best, Ashish
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Forum Post: RE: GIO impemenation
Could you please help us in the aforementioned problem? I cannot understand where these lists are pointed. Also I noticed that in GIO.xdc the definition of the structure GIO_Object is not the similar with the implementation in GIO.h. internal: /* -------- Internal Structures -------- */ struct Instance_State { String name; /* name used to create inst */ UInt mode; /* input or output */ UInt model; /* STANARD or ISSUERECLAIM */ UInt timeout; /* STANARD or ISSUERECLAIM */ IHeap.Handle packetHeap; /* heap used to alloc packets */ ISync.Handle sync; /* completion sync */ Bool userSync; /* user supplied sync handle*/ Queue.Object doneList; /* done packets */ Queue.Object freeList; /* free packets */ Ptr packets; /* allocated packet block */ Int numPackets; /* total # of packets */ Int freeCount; /* # of free packets */ Int doneCount; /* # of completed packets */ Int submitCount; /* # packets submitted to driver */ Ptr fxns; /* device function table */ Ptr mdChan; /* pointer to driver chan object */ }; } And in GIO.h the fields Queue.Object doneList; /* done packets */ Queue.Object freeList; /* free packets */ are missing. Also is any example? Best regards George
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Forum Post: RE: C674x MATHLIB_RTS 3.1.0.0: Problem overriding RTS functions when compiling under EABI
Hi Dave, Can you replace divdp.asm under mathlib _c674x_3_1_0_0\packages\ti\ mathlib \src\divdp\c674 with the following content? I added a global symbol __c6xabi_divd. Can you let me know if it works for you? Thanks. regards, Yimin * ======================================================================== * * MATHLIB -- TI Floating-Point Math Function Library * * * * * * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ * * * * * * Redistribution and use in source and binary forms, with or without * * modification, are permitted provided that the following conditions * * are met: * * * * Redistributions of source code must retain the above copyright * * notice, this list of conditions and the following disclaimer. * * * * Redistributions in binary form must reproduce the above copyright * * notice, this list of conditions and the following disclaimer in the * * documentation and/or other materials provided with the * * distribution. * * * * Neither the name of Texas Instruments Incorporated nor the names of * * its contributors may be used to endorse or promote products derived * * from this software without specific prior written permission. * * * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT * * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, * * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY * * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * ======================================================================== * * ======================================================================= * * divdp.asm - double precision floating point divide * * optimized hand ASM single sample * * ======================================================================= * .if __TI_EABI__ .asg divdp, _divdp .endif .global _divdp ; entry labels .if (OVERRIDE_RTS = 1) .global __divd .global __c6xabi_divd .endif .sect ".text:optasm" __c6xabi_divd: __divd: ; entry in rts6701 library _divdp: ; ans = arg1 / arg2 (all DP FP) rcpdp .S2 B5:B4, B7:B6 ; x1 = 1/arg2 [8-bits] || zero .L1 A7 ; MS word = 0 || zero .D1 A6 ; LS word = 0 set .S1 A7,30,30,A7 ; DP FP 2.0 (0x4000_0000) mpydp .M2 B5:B4, B7:B6, B9:B8 ; t = arg2 * x1 || extu .S2 B5,1,21,B2 ; exp2 = 0 ? nop 8 subdp .L2x A7:A6, B9:B8, B9:B8 ; t = 2.0 - (arg2*x1) nop 5 mpydp .M2 B7:B6, B9:B8, B7:B6 ; x2 = x1*(2-arg2*x1) nop 8 mpydp .M2 B5:B4, B7:B6, B9:B8 ; t = arg2 * x2 nop 8 subdp .L2x A7:A6, B9:B8, B9:B8 ; t = 2.0 - (arg2*x2) nop 5 mpydp .M2 B7:B6, B9:B8, B7:B6 ; x3 = x2*(2-arg2*x2) nop 8 mpydp .M2 B5:B4, B7:B6, B9:B8 ; t = arg2 * x3 nop 8 subdp .L2x A7:A6, B9:B8, B9:B8 ; t = 2.0 - (arg2*x3) nop 5 mpydp .M2 B7:B6, B9:B8, B7:B6 ; x4 = x3*(2-arg2*x3) nop 8 [B2] mpydp .M1x A5:A4, B7:B6, A5:A4 ; ans = arg1 * x4 ||[!B2] set .S1 A5,0,30,A5 ; exp/mant = all 1s (exp2=0) ||[!B2] or .L1 -1,A4,A4 ; lower mantissa = all 1s nop 3 b .S2 b3 ; normal function return nop 5 ; wait for ans in reg. pair .end ;-----------------End of DIVDP0.asm----------------------------------------- * ======================================================================== * * End of file: divdp.asm * * ======================================================================== *
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Forum Post: RE: Undefined references to ipc_gates and ipc_heaps, redux
I've discovered that the application fails at Ipc_start() for any core other than 0. I've pared the application down to 3 cores. Core 0 seems to get past Ipc_start, Core 1 throws an error and exits, and Core 2 seems to hang, usually in an Ipc_sync call. It is a pretty simple example, I've attached the code and .cfg below. Bios versions are described above.(Note this all works with older versions of the tools) Can anybody tell what I'm doing wrong? The console error is: Exception at 0xc00068c EFR=0x2 NRP=0xc00068c Internal exception: IERR=0x8 Opcode exception ti. sysbios .family.c64p.Exception: line 256: E_exceptionMax: pc = 0x0c00068c, sp = 0x00800e30. xdc.runtime.Error.raise: terminating execution The Debug session shows: (Core 0 is at a point where it is waiting for the other cores, it started normally, core 1 aborted, and core 2 is hung) Group 1 Spectrum Digital XDSPRO USB Emulator/C66xx_0 (Suspended) Notify_sendEvent() 0x8000942E (reason unknown) Spectrum Digital XDSPRO USB Emulator/C66xx_1 (Suspended) abort() at exit.c:109 0x80023100 (abort does not contain frame information) Spectrum Digital XDSPRO USB Emulator/C66xx_2 (Suspended) ti_sdo_ipc_Ipc_procSyncStart__I() 0x8000D7AE (reason unknown) Code: /* * Copyright (c) 2012, Texas Instruments Incorporated * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * * Neither the name of Texas Instruments Incorporated nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * */ /* * ======== notify_multicore.c ======== * Single-image version of Notify example * * See notify_multicore.k file for expected output. */ #include /* -----------------------------------XDC.RUNTIME module Headers */ #include /* ----------------------------------- IPC module Headers */ #include #include #include /* ----------------------------------- BIOS6 module Headers */ #include #include #include /* ----------------------------------- To get globals from .cfg Header */ #include //#include #define INTERRUPT_LINE 0 /* Notify event number that the app uses */ #define EVENTID 10 /* Number of times to run the loop */ #define NUMLOOPS 2 UInt32 seq = 0; UInt16 recvProcId; UInt16 srcProc, dstProc; /* ------------------------------------------------------------------------------------------------ * ======== cbFxn ======== * This function was registered with Notify. It is called when any event is * sent to this processor. */ Void cbFxn(UInt16 procId, UInt16 lineId, UInt32 eventId, UArg arg, UInt32 payload) { /* The payload is a sequence number. */ recvProcId = procId; seq = payload; Semaphore_post(semHandle); } /* ------------------------------------------------------------------------------------------------ * ======== tsk0_func ======== * Sends an event to the next processor then pends on a semaphore. * The semaphore is posted by the callback function. */ Void tsk0_func(UArg arg0, UArg arg1) { Int i = 1; Int status; if (MultiProc_self() == 0) { while (i <= NUMLOOPS) { /* Send an event to the next processor */ status = Notify_sendEvent(dstProc, INTERRUPT_LINE, EVENTID, i, TRUE); /* Continue until remote side is up */ if (status < 0) { continue; } System_printf("tsk1_func: Sent request #%d to %s\n", seq, MultiProc_getName(dstProc)); /* Wait to be released by the cbFxn posting the semaphore */ Semaphore_pend(semHandle, BIOS_WAIT_FOREVER); System_printf("tsk1_func: Received request #%d from %s\n", seq, MultiProc_getName(recvProcId)); i++; /* increment for next iteration */ } } else { while (seq < NUMLOOPS) { /* wait forever on a semaphore, semaphore is posted in callback */ Semaphore_pend(semHandle, BIOS_WAIT_FOREVER); System_printf("tsk1_func: Received request #%d from %s\n", seq, MultiProc_getName(recvProcId)); do { /* Send an event to the next processor. Since the next processor * may not be initialized yet, spin here until it is successful. * Wonder if there is a better way to check for ready? */ status = Notify_sendEvent(dstProc, INTERRUPT_LINE, EVENTID, seq, TRUE); } while( (status == Notify_E_NOTINITIALIZED ) ||(status == Notify_E_EVTNOTREGISTERED) ); if (status < 0) { System_abort("sendEvent failed\n"); } System_printf("tsk1_func: Sent request #%d to %s\n", seq, MultiProc_getName(dstProc)); } } System_printf("Test completed\n"); BIOS_exit(0); } /* ------------------------------------------------------------------------------------------------ * ======== main ======== * Synchronizes all processors (in Ipc_start), calls BIOS_start, and registers * for an incoming event * */ Int main(Int argc, Char* argv[]) { Int status; UInt numProcs = MultiProc_getNumProcessors(); /* Determine which processors Notify will communicate with based on the * local MultiProc id. Also, create a processor-specific Task. */ srcProc = ((MultiProc_self() - 1 + numProcs) % numProcs); dstProc = ((MultiProc_self() + 1 ) % numProcs); System_printf("main: MultiProc id = %d\n", MultiProc_self()); System_printf("main: MultiProc name = %s\n", MultiProc_getName(MultiProc_self())); /* Ipc_start() calls Ipc_attach() to synchronize all remote processors * because 'Ipc.procSync' is set to 'Ipc.ProcSync_ALL' in *.cfg */ status = Ipc_start(); if (status < 0) { System_abort("Ipc_start failed\n"); } /* Register call back with Notify. It will be called when the processor * with id = srcProc sends event number EVENTID to this processor. */ status = Notify_registerEvent(srcProc, INTERRUPT_LINE, EVENTID, (Notify_FnNotifyCbck)cbFxn, NULL ); if (status < 0) { System_abort("Notify_registerEvent failed\n"); } BIOS_start(); return (0); } .cfg file: /* * Copyright (c) 2012, Texas Instruments Incorporated * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * * Neither the name of Texas Instruments Incorporated nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * */ var MultiProc = xdc.useModule('ti.sdo.utils.MultiProc'); var System = xdc.useModule('xdc.runtime.System'); var SysMin = xdc.useModule('xdc.runtime.SysMin'); /* Modules explicitly used in the application */ var Notify = xdc.useModule('ti.sdo.ipc.Notify'); var Ipc = xdc.useModule('ti.sdo.ipc.Ipc'); var BIOS = xdc.useModule('ti.sysbios.BIOS'); var Task = xdc.useModule('ti.sysbios.knl.Task'); var SharedRegion = xdc.useModule('ti.sdo.ipc.SharedRegion'); var Semaphore = xdc.useModule('ti.sysbios.knl.Semaphore'); BIOS.heapSize = 0x8000; System.SupportProxy = SysMin; SysMin.bufSize = 2048; System.maxAtexitHandlers = 4; /* Get the list of names that the build device supports. * I.e. ["CORE0", "CORE1", "CORE2" ... ] */ var nameList = MultiProc.getDeviceProcNames(); MultiProc.numProcessors = 3; nameList = ["CORE0","CORE1","CORE2"]; /* Since this is a single-image example, we don't (at build-time) which * processor we're building for. We therefore supply 'null' as the local * procName and use MultiProc_setLocalId to set the procId at runtime. */ MultiProc.setConfig(null, nameList); var tsk0 = Task.create('&tsk0_func'); tsk0.instance.name = "tsk0"; /* To avoid wasting shared memory for MessageQ transports */ for (var i = 0; i < MultiProc.numProcessors; i++) { Ipc.setEntryMeta( { remoteProcId: i, setupMessageQ: false, } ); } /* Synchronize all processors (this will be done in Ipc_start) */ Ipc.procSync = Ipc.ProcSync_ALL; //SharedRegion.numEntries = 2; //SharedRegion.translate = false; /* Shared Memory base address and length */ var SHAREDMSMC = 0x0C000000; var SHAREDMSMCSIZE = 0x00100000; /* Need to define the shared region. The IPC modules use this * to make portable pointers. All processors need to add this * call with their base address of the shared memory region. * If the processor cannot access the memory, do not add it. */ SharedRegion.setEntryMeta(0, { base: SHAREDMSMC, len: SHAREDMSMCSIZE, ownerProcId: 0, isValid: true, name: "MSMC_RAM", } ); //var SHAREDDDR3 = 0x80000000; //var SHAREDDDR3SIZE = 0x10000000; //SharedRegion.setEntryMeta(1, // { base: SHAREDDDR3, // len: SHAREDDDR3SIZE, // ownerProcId: 0, // isValid: true, // createHeap: false, // name: "DDR3_RAM", // } ); /* Create a semaphore with count 0 */ Program.global.semHandle = Semaphore.create(0);
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Forum Post: RE: NDK task priorities vs. application task priorities
Hey Ashish, Finally got the ndk to rebuild (Java VM path would not set correctly until the PC was rebooted.) I still can't get the system to build as the original "ndk_2_24_00_11_copy" directory seems to be stuck in the path. I've checked in the Variables configuration window and everything is good in there. Where is the incorrect path coming from? Thanks, John C. **** Build of configuration Debug for project AIRtrac_ sysbios **** "C:\\ti\\ccsv6\\ccsv6\\utils\\bin\\gmake" -k all 'Building file: ../airtrac.cfg' 'Invoking: XDCtools' "C:/ti/ccsv6/xdctools_3_30_03_47_core/xs" --xdcpath="C:/ti/uia_1_03_01_08/packages;C:/ti/am335x_ sysbios _ind_sdk_1.1.0.5/sdk/platform;C:/ti/ccsv6/ccsv6/ccs_base;C:/ti/bios_6_40_03_39/packages;C:/ti/nsp_1_10_02_09/packages; C:/ti/ndk_2_24_00_11_copy/packages ;" xdc.tools.configuro -o configPkg -t ti.targets.arm.elf.A8Fnv -p AIRtrac_1 -r debug -c "C:/ti/ccsv6/ccsv6/tools/compiler/arm_5.1.6" --compileOptions "-g --optimize_with_debug" "../airtrac.cfg" making package.mak (because of package.bld) ... generating interfaces for package configPkg (because package/package.xdc.inc is older than package.xdc) ... configuring airtrac.xea8fnv from package/cfg/airtrac_pea8fnv.cfg ... js: "C:/Users/jconover/workspace_v6_1/AIRtrac_ sysbios /airtrac.cfg", line 25: xdc.services.global.XDCException: xdc.PACKAGE_NOT_FOUND: can't locate the package 'ti.ndk.config' along the path: 'C:/ti/uia_1_03_01_08/packages;C:/ti/am335x_ sysbios _ind_sdk_1.1.0.5/sdk/platform;C:/ti/ccsv6/ccsv6/ccs_base;C:/ti/bios_6_40_03_39/packages;C:/ti/nsp_1_10_02_09/packages;C:/ti/ndk_2_24_00_11_copy/packages;C:/ti/ccsv6/xdctools_3_30_03_47_core/packages;..;'. Ensure that the package path is set correctly. "./package/cfg/airtrac_pea8fnv.cfg", line 195 gmake.exe: *** [package/cfg/airtrac_pea8fnv.xdl] Error 1 Warning: directory "C:/ti/ndk_2_24_00_11_copy/packages" on package path does not exist js: "C:/ti/ccsv6/xdctools_3_30_03_47_core/packages/xdc/tools/Cmdr.xs", line 51: Error: xdc.tools.configuro: configuration failed due to earlier errors (status = 2); 'linker.cmd' deleted. making ../src/ sysbios /sysbios.aea8fnv ... gmake[1]: Entering directory `C:/Users/.../workspace_v6_1/AIRtrac_ sysbios /src/ sysbios ' ..... area8fnv BIOS.obj arm_IntrinsicsSupport_asm.obj arm_TaskSupport_asm.obj exc_Exception_asm.obj a8_TimestampProvider_asm.obj a8_Mmu_asm.obj a8_Cache_asm.obj intcps_Hwi_asm.obj intcps_Hwi_asm_switch.obj gptimer_Timer_asm.obj dmtimer_Timer_asm.obj ... gmake[1]: Leaving directory `C:/Users/.../workspace_v6_1/AIRtrac_ sysbios /src/ sysbios ' gmake: Target `all' not remade because of errors. **** Build Finished ****
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Forum Post: Spinlock lockup using touch screen controller and analog inputs on AM335x
I have been trying to use the ti-tscadc device for touch screen inputs and read the analog inputs on an AM335x. I am letting the touch screen inputs go directly to the windows system and I am reading the analog input by reading from /sys/bus/iio/devices/iio:device0/in_voltage4_raw. I find that doing either one separately (i.e. disconnecting the touch screen, or not reading the analog inputs) appears to work 100% of the time. However, when I do both, it only works most of the time. Occasionally when I press the touch screen I'll get a message from the kernel and it will lock up (actually it appears to be stuck in the kernel since I can get more kernel messages if I keep pressing, but nothing else is responsive). I'm looking for ideas on how to avoid or recover from this apparent bug. The messages I get from the kernel are: BUG: spinlock lockup suspected on CPU#0... or sometimes BUG: spinlock recursion on CPU#0... (titsc_irq... Exception stack... (tiadc_read_raw... Here is the full output from one time it locked up: [55862.321774] BUG: spinlock recursion on CPU#0, Surveyor/12677 [55862.327733] lock: 0xde0d6a28, .magic: dead4ead, .owner: Surveyor/12677, .owner_cpu: 0 [55862.336056] [ ] (unwind_backtrace+0x1/0x9c) from [ ] (do_raw_spin_lock+0xf9/0x114) [55862.345640] [ ] (do_raw_spin_lock+0xf9/0x114) from [ ] (regmap_write+0x1b/0x38) [55862.354947] [ ] (regmap_write+0x1b/0x38) from [ ] (titsc_irq+0x9f/0x234) [55862.363612] [ ] (titsc_irq+0x9f/0x234) from [ ] (handle_irq_event_percpu+0x3b/0x188) [55862.373364] [ ] (handle_irq_event_percpu+0x3b/0x188) from [ ] (handle_irq_event+0x29/0x3c) [55862.383661] [ ] (handle_irq_event+0x29/0x3c) from [ ] (handle_level_irq+0x53/0x8c) [55862.393229] [ ] (handle_level_irq+0x53/0x8c) from [ ] (generic_handle_irq+0x13/0x1c) [55862.402986] [ ] (generic_handle_irq+0x13/0x1c) from [ ] (handle_IRQ+0x23/0x60) [55862.412192] [ ] (handle_IRQ+0x23/0x60) from [ ] (omap3_intc_handle_irq+0x51/0x5c) [55862.421682] [ ] (omap3_intc_handle_irq+0x51/0x5c) from [ ] (__irq_svc+0x3b/0x5c) [55862.431061] Exception stack(0xdf527e30 to 0xdf527e78) [55862.436352] 7e20: 00000000 00000004 00000000 c08aafcc [55862.444917] 7e40: de0d6a00 de0d4540 00000000 0001ffff 00000054 df0dc610 000c4a10 00001fff [55862.453482] 7e60: 00000000 df527e78 c02d0dff c02d0678 60000033 ffffffff [55862.460417] [ ] (__irq_svc+0x3b/0x5c) from [ ] (_regmap_write+0xe8/0x18c) [55862.469169] [ ] (_regmap_write+0xe8/0x18c) from [ ] (regmap_write+0x25/0x38) [55862.478197] [ ] (regmap_write+0x25/0x38) from [ ] (tiadc_read_raw+0x3b/0x104) [55862.487323] [ ] (tiadc_read_raw+0x3b/0x104) from [ ] (iio_read_channel_info+0x21/0x1b4) [55862.497356] [ ] (iio_read_channel_info+0x21/0x1b4) from [ ] (dev_attr_show+0x11/0x28) [55862.507203] [ ] (dev_attr_show+0x11/0x28) from [ ] (sysfs_read_file+0x65/0xc8) [55862.516413] [ ] (sysfs_read_file+0x65/0xc8) from [ ] (vfs_read+0x65/0xf8) [55862.525162] [ ] (vfs_read+0x65/0xf8) from [ ] (sys_read+0x29/0x48) [55862.533277] [ ] (sys_read+0x29/0x48) from [ ] (ret_fast_syscall+0x1/0x46) [55875.451034] BUG: spinlock lockup suspected on CPU#0, Surveyor/12677 [55875.457597] lock: 0xde0d6a28, .magic: dead4ead, .owner: Surveyor/12677, .owner_cpu: 0 [55875.465894] [ ] (unwind_backtrace+0x1/0x9c) from [ ] (do_raw_spin_lock+0xb9/0x114) [55875.475464] [ ] (do_raw_spin_lock+0xb9/0x114) from [ ] (regmap_write+0x1b/0x38) [55875.484760] [ ] (regmap_write+0x1b/0x38) from [ ] (titsc_irq+0x9f/0x234) [55875.493420] [ ] (titsc_irq+0x9f/0x234) from [ ] (handle_irq_event_percpu+0x3b/0x188) [55875.503170] [ ] (handle_irq_event_percpu+0x3b/0x188) from [ ] (handle_irq_event+0x29/0x3c) [55875.513464] [ ] (handle_irq_event+0x29/0x3c) from [ ] (handle_level_irq+0x53/0x8c) [55875.523032] [ ] (handle_level_irq+0x53/0x8c) from [ ] (generic_handle_irq+0x13/0x1c) [55875.532782] [ ] (generic_handle_irq+0x13/0x1c) from [ ] (handle_IRQ+0x23/0x60) [55875.541987] [ ] (handle_IRQ+0x23/0x60) from [ ] (omap3_intc_handle_irq+0x51/0x5c) [55875.551467] [ ] (omap3_intc_handle_irq+0x51/0x5c) from [ ] (__irq_svc+0x3b/0x5c) [55875.560845] Exception stack(0xdf527e30 to 0xdf527e78) [55875.566134] 7e20: 00000000 00000004 00000000 c08aafcc [55875.574701] 7e40: de0d6a00 de0d4540 00000000 0001ffff 00000054 df0dc610 000c4a10 00001fff [55875.583265] 7e60: 00000000 df527e78 c02d0dff c02d0678 60000033 ffffffff [55875.590198] [ ] (__irq_svc+0x3b/0x5c) from [ ] (_regmap_write+0xe8/0x18c) [55875.598949] [ ] (_regmap_write+0xe8/0x18c) from [ ] (regmap_write+0x25/0x38) [55875.607973] [ ] (regmap_write+0x25/0x38) from [ ] (tiadc_read_raw+0x3b/0x104) [55875.617087] [ ] (tiadc_read_raw+0x3b/0x104) from [ ] (iio_read_channel_info+0x21/0x1b4) [55875.627111] [ ] (iio_read_channel_info+0x21/0x1b4) from [ ] (dev_attr_show+0x11/0x28) [55875.636953] [ ] (dev_attr_show+0x11/0x28) from [ ] (sysfs_read_file+0x65/0xc8) [55875.646157] [ ] (sysfs_read_file+0x65/0xc8) from [ ] (vfs_read+0x65/0xf8) [55875.654906] [ ] (vfs_read+0x65/0xf8) from [ ] (sys_read+0x29/0x48) [55875.663019] [ ] (sys_read+0x29/0x48) from [ ] (ret_fast_syscall+0x1/0x46) Here is the device tree: tscadc { compatible = "ti,ti-tscadc"; reg = ; interrupt-parent = ; interrupts = ; ti,hwmods = "adc_tsc"; status = "okay"; tsc { ti,wires = ; ti,x-plate-resistance = ; ti,coordinate-readouts = ; ti,wire-config = ; }; adc { ti,adc-channels = ; }; }; Here is the code that reads the analog input: bool Hardware::readAdcRaw(Adc adc, unsigned int &rawReading) { const char* const AIN4_FILE_NAME = "/sys/bus/iio/devices/iio:device0/in_voltage4_raw"; const char* const AIN5_FILE_NAME = "/sys/bus/iio/devices/iio:device0/in_voltage5_raw"; const char* ainFileName = ""; switch (adc) { case MPU_VOLTAGE: ainFileName = AIN4_FILE_NAME; break; case CORE_VOLTAGE: ainFileName = AIN5_FILE_NAME; break; } bool validReading = false; // Get reading from analog input if we can. // Note: if we can't get a reading, don't retry immediately. That causes spinlock recursion in the titsc interrupt. // Instead we just try again at our next scheduled reading time. // In an all day run about 1 in every 22 readings was missed due to this with no more than 2 in a row. std::ifstream ainFile; char lineIn[10]; //Readings are 5 characters, so this is 2x what we need. lineIn[0] = '\0'; ainFile.open(ainFileName); if (ainFile.is_open()) { ainFile.getline(lineIn, sizeof(lineIn)); ainFile.close(); if (0 != strlen(lineIn)) { validReading = true; rawReading = atoi(lineIn); } } else { LOG_ERROR() << "Error opening " << ainFileName; } return validReading; } I also tried reading the analog input from the shell using while true do cat in_voltage5_raw done That didn't get the Spinlock errors. Instead, after some touch screen presses, it got stuck constantly reporting: cat: in_voltage5_raw: Resource temporarily unavailable
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Forum Post: RE: Need help understanding differences between working codecs and codec examples
Rob - when you described the moving of the package over, were you referring to the release package? I'm thinking that's what I missed. Would the process for me go something like: * Modify/build SCALE in the codec examples source tree * Debug it using the example codec server * Build SCALE release version * Copy the release package to the omap3530 folder with the rest of the production codecs * Re-build the production codec server ?
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Forum Post: RE: Undefined references to ipc_gates and ipc_heaps, redux
I've discovered that somewhere between the old tools I was using and the new ones, the default memory for all the sections changed from L2SRAM (not shared) to external DDR3 (shared). This means that variables defined at file level scope are now visible to all cores. One of these variables is used in the call to Notify_registerEvent() which is failing, likely because the variable needs to be local to each core. Where is the default memory for all the linker sections set? In the platform package? I think the old and new tools have them in different places. If so, how do I change it? I've seen how it can be set manually in the .cfg file with Program.sectmap[.text] = "L2SRAM" for example, but one doesn't necessarily know all the sections generated by sysbios /xdc/ipc/targets, etc. They all moved from unshared to shared memory. Thanks for any advice. Mike
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Forum Post: RE: LCD config about AM3715
Hello, Android 4.0 release is no longer maintained or supported. Only the latest JellyBean 4.2.2 release is supported on TI platforms like AM335x SK, AM335x EVM and BeagleboneBlack in this forum.
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Forum Post: RE: NDK task priorities vs. application task priorities
Ashish, Because the xdcpath still seems to have "C:/ti/ndk_2_24_00_11_copy/packages" in it, even thought I've gone back to the original NDK, I can no longer build the project. Do you have any idea why "--xdcpath=" is not changing? Thanks, John C.
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Forum Post: RE: Steps to add the NDK to an existing SYSBIOS project running on custom hardware
Steve, Thanks for all your time on this subject. I know this very detailed, but as you said the NSP is complicated and not very straight forward with what needs to be modified, or what are the ramification to some changes. Nimu_eth.c We both agree no changes are necessary to this file. However, I believe the documentation is again out of date. Section 1.5 in the Design Driver Guide maps how the calls flow down through the layers. This appears to be outdated. Below I'll list what is in the Design Driver Guide, and then what I see in the NSP code. Even though you say EMAC_timerTick( ) only gets called in polling mode, based on what I see below, I don't see how EMAC_timerTick( ) ever gets called. Not an issue right now, as I'll stay with interrupt mode, but something isn't right. Guide: EmacInit -> HwPktInit Code: EmacInit -> HwPktInit -> EMAC_getConfig Guide: EmacStart-> HwPktOpen -> EMAC_open and MDIO_open Code: EmacStart -> HwPktOpen -> EMAC_open and MDIO_open and EMAC_initialize Guide: Emacioctrl -> HwPktSetRx -> EMAC_setReceiverFilter plus five other routines Code: Emacioctrl -> HwPktSetRx -> EMAC_setReceiverFilter Guide: EmacSend -> HwPktTxNext -> EMAC_sendPacket and EMAC_TxServiceCheck Code: EmacSend -> HwPktTxNext -> EMAC_sendPacket Guide: EmacPktService -> HwRxInt -> EMAC_RxServiceCheck Code: EmacPktService -> PBMQ_deq -> NIMUReceivePacket Guide: EmacPoll -> _HwPktPoll -> EMAC_TimerTick and MDIO_timerTick and MDIO_getStatus Code: EmacPoll -> _HwPktPoll -> MDIO_timerTick Ethdriver.c CORENUM. Still don't understand what this really does and why it needs to be 1 for the C6748. I looked briefly at the C6748 Tech Manual, and the EMAC section does define these "cores". There are three of them, and appear to be related to how the EMAC controller interrupts the DSP. Too far down the EMAC rabbit hole for me. I'll just take your word for it that it should be 1. EXTERNAL_MEMORY and EXTMEM. These two bother me. They are defined at the top of Ethdriver.c, thus the code in these routines are "trying" to do something. I can see on the BUFFERS tab from the *.cfg file where the PBM Buffers are defined. By default frames is 192, and size is 1536. Since this is buffer pool is larger than the L3 internal memory, it can't go there. The data section defined is indeed being placed in DDR2. Furthermore, the way the code is written, it appears that OEMCacheClean( ) will be called if the data section is placed in L3(0x80000000) or DDR2(0xC0000000). I can only speculate that these two variables are only for when the PBM Buffer will fit within L1D or L2, and of course you must force the PBM Buffer to reside in either of these memory sections. Bottom line, these appear to be very important and shouldn't be touched. PKT_MAX. Our application is going in a mission critical location. Therefore dropped RX or TX Ethernet frames need to be avoided. The links you provided don't really help me understand what are the downsides to increasing this number (aside from more memory used). I want to increase this number, but there must be some relation between this number and the frames + size you define in the PBM Bufffers *.cfg. With frames currently defined to be 192, and PKT_MAX defined to be 64, I'm not seeing the relationship. PKT_PREPAD. I understand your explanation. I agree I should just leave it alone, as memory space isn't an issue. RAM_MCST, HASH_MCST, and PKT_MAX_MCST. According to the Driver Design Guide, these appear to very hardware specific. Since this NSP was based on the OMAPL138, and I'm using the C6748, I'll just leave them alone and hope for the best. csl_emac.c I would still like some more explanation on EMAC_timerTick( ). Based on what I see from the NSP code, I can't see any way this gets called, even if the NDK is configured for polling mode. The good news, is it appears no code changes are necessary. csl_mdio.c Please continue to ask around about the variable macsel, and the VBUSCLK definition. The code that uses macsel appears to only care about GMII and RGMII, which seems odd. The code clearly loads a MDIO register with the VBUSCLK number, so it must be somewhat important. According to the C6748 Tech Manual, it looks like it may control the MDIO CLK frequency. Since the MDIO clock is only rated to run up to 2.5MHz, this divider could make the difference between MDIO working or not. emacHooks.c We haven't talked about this file yet, but I believe modifications are necessary. Remember this file was pulled (somewhat randomly) from one of the NSP example projects. EMAC_initialize( ) needs to be modified. I really don't understand what GPIO_CONTROL_REG and TIMER_GLOBAL_REG are doing. The pinmux stuff can go, as that is defined in our project in the GEL file or with the boot ROM (via the AISgen tool). Basically we define all our pinmux stuff up front, and don't change it during run time. Load CFGCHIP[3] is how you tell the EMAC you want MII or RMII (plus the proper pinmux settings). Hey, we found an important change location. This routine would also be a good location to make sure we fired a HW RESET pulse to the Ethernet PHY chip. We control the RESET via a GPIO pin, so we can setup the pulse here. EMAC_getConfig( ) needs to be modified. Basically this routine is poorly named, as all it really does is fetch the MAC address from our application. Where ever we store the MAC address, we should copy it into pMacAddr. Finally EMAC_linkStatus( ) needs to be modified. This tells our application when the Ethernet cable gets plugged / unplugged. Our application can react accordingly to those events. Thanks, Dean
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Forum Post: RE: Tiva + CCS 6 + TIRTOS, how to add/configure a timer via the GUI
Hi Doug, For more info on how to use the GUI tool (also called XGCONF) for configuring your application, please refer Section 2 of the SYS/BIOS user guide . [quote user="Doug Baker"] 1) I need a 2kHz timer to drive a PWM waveform that I can enable and disable. [/quote] I would recommend using the TI-RTOS PWM driver for this purpose. There are 2 flavors of the driver - PWMTiva and PWMTimerTiva. The former uses the PWM peripheral whereas the later uses the general purpose timer to generate PWM waveforms. TI-RTOS ships with a PWM example that you can refer. This example uses PWMTiva but can be modified to use PWMTimerTiva (better if you need a more accurate duty cycle). This module cannot be configured through the GUI. The only GUI config item for this driver is an option to include this driver: [quote user="Doug Baker"] 2) I need a periodic timer that fires every 100mS. This can run forever. [/quote] Instead of creating a timer instance, I think it is better to create a clock instance to call a callback function periodically. You should be able to create clock instances with the desired period through the GUI: [quote user="Doug Baker"] 3) I need a free running clock/timer I can read the register to precisely time events. In the Stellaris, I used a clock running full speed and I could read the clock count register at time T1, go do something and read the clock count register at time T2 and calculate the time between T1 and T1 precisely. [/quote] For this purpose I would recommend using the timestamp module. The timestamp module can be included and configured using the GUI too. Here is a link to the platform independent proxy timestamp module APIs . You could also use the platform specific timestamp module APIs directly. [quote user="Doug Baker"] 4) I periodic timer to fire the ADC at 12kHz. [/quote] There are a few ways this can be done. One way is of course to create another clock object (will have only 1ms precision). If you need a more precise period, you can create a timer instance. This can be done through the GUI too. The XGCONF overview window has a box for adding the timer. An alternative is to modify the TI-RTOS PWM driver and program it to trigger the ADC at a frequency of 12kHz. This will be a more efficient way. Best, Ashish
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