Forum Post: RE: Linux kernel booting issue
Dear Titus,I am using ti-sdk-am335x-evm-06.00.00.00-Linux-x86-Install.bin & this file system is from TI SDK. I am trying to boot from SD card..Please have a look of attached udev & rcS...
View ArticleForum Post: RE: calling java from XDC Script issues
Any Ideas on why xs can't create a sessions manager / find the JVM?I noticed in version 1.5 which is distributed with XDCtools had a javaws directory which 1.7 had lumped into bin. I added the...
View ArticleForum Post: RE: GPIO pin 53 and 54 in u-boot
I think the GPIO accesses are being done from the u-boot bootcmd environment variable. If you stop the auto-boot to the u-boot, you can get to the u-boot command line. Entering "printenv bootcmd"...
View ArticleForum Post: RE: How to Customize Splash Screen - UBoot and Kernel
Hi Titus,I am not sure whether I need that or not. I am using Variscite SOM and the default variscite splash screen is working. What I think I need to do after banging my head against the brick wall is...
View ArticleForum Post: RE: AM335x EVM booting with USB problem
Hi Durai,Sounds good.[quote][ 13.555923] musb_hdrc: Unknown symbol usb_hcd_resume_root_hub (err -22)[ 13.577678] musb_hdrc: disagrees about version of symbol usb_hcd_unlink_urb_from_ep[ 13.585904]...
View ArticleForum Post: RE: USB enumeration change
I suspect the issue is because when you disconnect the module, the GPS application still holds ttyUSB3, so while the module is re-enumerated, ttyUSB3 is still locked, so the next available ttyUSB4 is...
View ArticleForum Post: RE: Ipc_detach not working on slave core even when master...
Ramsey,Here is the map. According to the EZSDK memory map, I am using the region that is supposed to be for LINUX_MEM_2, Linux is not using it for this tests.var mem_normal =[ ["DDR3_HOST", { comment:...
View ArticleForum Post: RE: Optimal H264 HP encoder parameters
Sudheesh-Or to ask another way, if we were to modify TI video codec source for improved quality in action/motion sequences, which area would you recommend working on first? Adaptive GOP?-Jeff
View ArticleForum Post: RE: TM4C129x: Low Power Mode support TI RTOS
Thank you Scott.Got struck with something else and got delayed in Acknowledging.Will try the same and share my observations. Thanks and regards,Gupta
View ArticleForum Post: RE: LCDK C6748 - tick stays 0
Do you have the c6748 or the omap138? Or in other words, is there an Arm or not?Regarding the output...we generally use SysMin which maintains a internal buffer that is only sent to the CCS console on...
View ArticleForum Post: RE: calling java from XDC Script issues
After trying the --d I learned two things:1) I needed to point xdc to a 32bit JRE2) Then environment variable needed to be pointing to the directory containing the jre directory, not the jre directory...
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Forum Post: RE: TI-RTOS (Tiva C) / Call stack available?
Hi Tim,You can look at the Task stacks in Tools->ROV.If there an exception, you can see the stack in the ROV->Hwi->Exception.Todd
View ArticleForum Post: RE: Can not display UIA Log in CCS
Hi Wei,Would you please run the System Analyzer again.If you can see UDP packets from WireShark, the same packets will stream to the bin file as well.Note that the bin file will be cleared before every...
View ArticleForum Post: RE: USB Device not recognized
I'll try your steps.ROV only works when you halt the target.Todd
View ArticleForum Post: RE: debug for notify example using ccs on DM8148
Miao,The old SysLink 'samples' have been deprecated. I suggest you use the new 'examples'. Unfortunately, we did not start shipping the new examples until SysLink 2.10. I suggest you download the last...
View ArticleForum Post: RE: NDK: High task stack usage with TCP loopback
Ralf,I see. I'll work on reproducing this issue and I'll get back to you.Thanks,Moses
View ArticleForum Post: RE: Questions about DSPLINK.
Misha,Re: SR_0. Sorry, I was mixed up with another thread. SR_0 refers to Shared Region #0, which is used by SysLink, not DSPLink. You can ignore that comment.I'm wondering if you found a solution...
View ArticleForum Post: RE: Enabling External Memory(DDR3) Non cacheable
If you use the L2 Cache calls on DDR, they is no need to use the L1 Cache calls.Todd
View ArticleForum Post: RE: PIE interrupts within BIOS not working (any HWI's)
Can you attach your project? It might be easier to debug it.Todd
View ArticleForum Post: RE: [Question] DHCP client IP time out period depends on switch
What is your application doing at the beginning? Do you have higher priority tasks running that would starve the NDK's main thread? Can you put a breakpoint on the EMAC driver's transmit call and see...
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