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Forum Post: RE: AM335x DMTimer Enable/Disable is very slow (~60 us)

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Here are the functions I use to configure the timer.

 

void Enable_Timers_32KHz()
{
 WR_MEM_32(CM_PER_TIMER2_CLKCTRL, 0x2);
 WR_MEM_32(CLKSEL_TIMER2_CLK, 0x2);

 WR_MEM_32(CM_PER_TIMER3_CLKCTRL, 0x2);
 WR_MEM_32(CLKSEL_TIMER3_CLK, 0x2);

 WR_MEM_32(CM_PER_TIMER4_CLKCTRL, 0x2);
 WR_MEM_32(CLKSEL_TIMER4_CLK, 0x2);

 WR_MEM_32(CM_PER_TIMER5_CLKCTRL, 0x2);
 WR_MEM_32(CLKSEL_TIMER5_CLK, 0x2);

 WR_MEM_32(CM_PER_TIMER6_CLKCTRL, 0x2);
 WR_MEM_32(CLKSEL_TIMER6_CLK, 0x2);

 WR_MEM_32(CM_PER_TIMER7_CLKCTRL, 0x2);
 WR_MEM_32(CLKSEL_TIMER7_CLK, 0x2);

        //printf("Timers 2-7 enabled for 32KHz.\n");
}

 

void DMTimer3ModuleClkConfig(void)
{
    HWREG(SOC_CM_PER_REGS + CM_PER_L3S_CLKSTCTRL) =
                             CM_PER_L3S_CLKSTCTRL_CLKTRCTRL_SW_WKUP;

    while((HWREG(SOC_CM_PER_REGS + CM_PER_L3S_CLKSTCTRL) &
     CM_PER_L3S_CLKSTCTRL_CLKTRCTRL) != CM_PER_L3S_CLKSTCTRL_CLKTRCTRL_SW_WKUP);

    HWREG(SOC_CM_PER_REGS + CM_PER_L3_CLKSTCTRL) =
                             CM_PER_L3_CLKSTCTRL_CLKTRCTRL_SW_WKUP;

    while((HWREG(SOC_CM_PER_REGS + CM_PER_L3_CLKSTCTRL) &
     CM_PER_L3_CLKSTCTRL_CLKTRCTRL) != CM_PER_L3_CLKSTCTRL_CLKTRCTRL_SW_WKUP);

    HWREG(SOC_CM_PER_REGS + CM_PER_L3_INSTR_CLKCTRL) =
                             CM_PER_L3_INSTR_CLKCTRL_MODULEMODE_ENABLE;

    while((HWREG(SOC_CM_PER_REGS + CM_PER_L3_INSTR_CLKCTRL) &
                               CM_PER_L3_INSTR_CLKCTRL_MODULEMODE) !=
                                   CM_PER_L3_INSTR_CLKCTRL_MODULEMODE_ENABLE);

    HWREG(SOC_CM_PER_REGS + CM_PER_L3_CLKCTRL) =
                             CM_PER_L3_CLKCTRL_MODULEMODE_ENABLE;

    while((HWREG(SOC_CM_PER_REGS + CM_PER_L3_CLKCTRL) &
        CM_PER_L3_CLKCTRL_MODULEMODE) != CM_PER_L3_CLKCTRL_MODULEMODE_ENABLE);

    HWREG(SOC_CM_PER_REGS + CM_PER_OCPWP_L3_CLKSTCTRL) =
                             CM_PER_OCPWP_L3_CLKSTCTRL_CLKTRCTRL_SW_WKUP;

    while((HWREG(SOC_CM_PER_REGS + CM_PER_OCPWP_L3_CLKSTCTRL) &
                              CM_PER_OCPWP_L3_CLKSTCTRL_CLKTRCTRL) !=
                                CM_PER_OCPWP_L3_CLKSTCTRL_CLKTRCTRL_SW_WKUP);

    HWREG(SOC_CM_PER_REGS + CM_PER_L4LS_CLKSTCTRL) =
                             CM_PER_L4LS_CLKSTCTRL_CLKTRCTRL_SW_WKUP;

    while((HWREG(SOC_CM_PER_REGS + CM_PER_L4LS_CLKSTCTRL) &
                             CM_PER_L4LS_CLKSTCTRL_CLKTRCTRL) !=
                               CM_PER_L4LS_CLKSTCTRL_CLKTRCTRL_SW_WKUP);

    HWREG(SOC_CM_PER_REGS + CM_PER_L4LS_CLKCTRL) =
                             CM_PER_L4LS_CLKCTRL_MODULEMODE_ENABLE;

    while((HWREG(SOC_CM_PER_REGS + CM_PER_L4LS_CLKCTRL) &
      CM_PER_L4LS_CLKCTRL_MODULEMODE) != CM_PER_L4LS_CLKCTRL_MODULEMODE_ENABLE);

    /* Select the clock source for the Timer3 instance. */ 
    HWREG(SOC_CM_DPLL_REGS + CM_DPLL_CLKSEL_TIMER3_CLK) &=
          ~(CM_DPLL_CLKSEL_TIMER3_CLK_CLKSEL);

    HWREG(SOC_CM_DPLL_REGS + CM_DPLL_CLKSEL_TIMER3_CLK) |=
          CM_DPLL_CLKSEL_TIMER3_CLK_CLKSEL_SEL3;

    while((HWREG(SOC_CM_DPLL_REGS + CM_DPLL_CLKSEL_TIMER3_CLK) &
           CM_DPLL_CLKSEL_TIMER3_CLK_CLKSEL) !=
           CM_DPLL_CLKSEL_TIMER3_CLK_CLKSEL_SEL3);

    HWREG(SOC_CM_PER_REGS + CM_PER_TIMER3_CLKCTRL) |=
                             CM_PER_TIMER3_CLKCTRL_MODULEMODE_ENABLE;

    while((HWREG(SOC_CM_PER_REGS + CM_PER_TIMER3_CLKCTRL) &
       CM_PER_TIMER3_CLKCTRL_MODULEMODE) != CM_PER_TIMER3_CLKCTRL_MODULEMODE_ENABLE);

    while((HWREG(SOC_CM_PER_REGS + CM_PER_TIMER3_CLKCTRL) &
       CM_PER_TIMER3_CLKCTRL_IDLEST) != CM_PER_TIMER3_CLKCTRL_IDLEST_FUNC);

    while(!(HWREG(SOC_CM_PER_REGS + CM_PER_L3S_CLKSTCTRL) &
            CM_PER_L3S_CLKSTCTRL_CLKACTIVITY_L3S_GCLK));

    while(!(HWREG(SOC_CM_PER_REGS + CM_PER_L3_CLKSTCTRL) &
            CM_PER_L3_CLKSTCTRL_CLKACTIVITY_L3_GCLK));

    while(!(HWREG(SOC_CM_PER_REGS + CM_PER_OCPWP_L3_CLKSTCTRL) &
           (CM_PER_OCPWP_L3_CLKSTCTRL_CLKACTIVITY_OCPWP_L3_GCLK |
            CM_PER_OCPWP_L3_CLKSTCTRL_CLKACTIVITY_OCPWP_L4_GCLK)));

    while(!(HWREG(SOC_CM_PER_REGS + CM_PER_L4LS_CLKSTCTRL) &
           (CM_PER_L4LS_CLKSTCTRL_CLKACTIVITY_L4LS_GCLK |
            CM_PER_L4LS_CLKSTCTRL_CLKACTIVITY_TIMER3_GCLK)));

}


void Enable_ADC_Timer_Clock()
{

 /* This function will enable clocks for the DMTimer3 instance */
 DMTimer3ModuleClkConfig();

}


void Create_ADC_Timer_DMTimer()
{
    //Timer_Handle ADC_Timer;
    Timer_Params ADC_Timer_Params;
    //Hwi_Params ADC_Timer_Hwi_Params;
    Error_Block eb;

    Error_init(&eb);
    Timer_Params_init(&ADC_Timer_Params);
    //Hwi_Params_init(&ADC_Timer_Hwi_Params);

    //ADC_Timer_Params.hwiParams = &ADC_Timer_Hwi_Params;
    ADC_Timer_Params.period = 500;
    ADC_Timer_Params.periodType = Timer_PeriodType_MICROSECS;
    ADC_Timer_Params.arg = 0;
    ADC_Timer_Params.startMode = Timer_StartMode_USER;
    ADC_Timer_Params.runMode = Timer_RunMode_ONESHOT;
    Timer_Handle ADC_Timer = Timer_create(1, (Timer_FuncPtr)ADC_Timer_ISR, &ADC_Timer_Params, &eb);

}


void Create_ADC_Timer_HWI()
{
 Hwi_Handle OLD_ADC_Timer_Hwi;
 Hwi_Handle ADC_Timer_Hwi;
 Hwi_Params ADC_Timer_Hwi_Params;
    Error_Block eb;

    Error_init(&eb);
    Hwi_Params_init(&ADC_Timer_Hwi_Params);

    // Delete HWI previously created by Create_ADC_Timer_DMTimer()
    OLD_ADC_Timer_Hwi = Hwi_getHandle(SYS_INT_TINT3); // Returns Hwi_Handle associated with SYS_INT_TINT3
    if (OLD_ADC_Timer_Hwi != NULL)
    {
     Hwi_delete(&OLD_ADC_Timer_Hwi); // Finalize and free this previously allocated instance object, setting the referenced handle to NULL
    }

    // Create HWI for TINT3 for DMTimer3 for ADC Timer
    ADC_Timer_Hwi = Hwi_create(SYS_INT_TINT3, (Hwi_FuncPtr)ADC_Timer_ISR, &ADC_Timer_Hwi_Params, &eb);
    if (ADC_Timer_Hwi == NULL) {
      System_abort("Hwi create failed");
    }

}


void ADC_Timer_Config(void)
{

    /* Configure the DMTimer for One-shot and no-compare mode */
    DMTimerModeConfigure(SOC_DMTIMER_3_REGS, DMTIMER_ONESHOT_NOCMP_ENABLE);

    /* Load the counter with the initial count value */
    DMTimerCounterSet(SOC_DMTIMER_3_REGS, ADC_TIMER_INITIAL_COUNT);

    /* Load the load register with the reload count value */
    DMTimerReloadSet(SOC_DMTIMER_3_REGS, ADC_TIMER_RLD_COUNT);

    /* Stop/Reset the DMTimer */
    DMTimerDisable(SOC_DMTIMER_3_REGS);

}

 


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