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Forum Post: DM368 Mcbsp Channel Swapping and QUEPRI Register Value Auto Set

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hi all,

We are working on DM368 now and using it to encode video and audio. Now we have a big problem of McBSP runtime channel swapping as http://processors.wiki.ti.com/index.php/McBSP_Channel_Swapping, i.e. when DM368 only encodes audio, the encoded sound stream is normal, however, when it encodes audio and video at the same time, the left / right stereo swaps several times at runtime. 

We are now following the steps on the TI wiki webpage above, but when we change the value of QUEPRI register to 0x0000_0110 to make TC0 (VoiceCodec RX/TX events are in Queue0; Queue3 is not used) the highest priority, we also read the value, it is surely 0x0000_0110. But when we run hdvicp. the QUEPRI register value is set to 0x0000_0111. Could someone tell me how to solve this problem?

The linux kernel version is 2.6.32; dvsdk version is 4.2.0.6; codec-engine version is 2.26.02.11.

Best Regards,

Tiandong Wang


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