The clock phase and polarity are controlled by the POLARITY and PHASE bits of the SPIFMTn registers. Try all four combinations of PHASE and POLARITY. I have a suspicion that TI's definition of phase and polarity are opposite the rest of the industry.
I have only used the MSB option or SPIFMTn.SHIFTDIR=0. Works for me.
Double check that are you are using the desired format register in the transfer - SPIDAT1.DFSEL
Not being a HW guy, I can't comment on the tolerance of the pads to shorts. The few times I have shorted pins, the chip seemed to be unharmed. But that may be due to current limiting bench supply that I am using.
If the future, please start a new thread for new problems. The thread owner and other contributors probably don't want to hear this chatter.
